29 July 2018 to 4 August 2018
Russian Academy of Sciences
Europe/Moscow timezone

Front end Electronics of the Compact High Energy Camera (CHEC)

31 Jul 2018, 10:55
30m
Blue Hall (Russian Academy of Sciences)

Blue Hall

Russian Academy of Sciences

Leninsky Prospekt, 32а Moscow 119071 Russian Federation
Board: 18
poster presentation Technological aspects and applications of Cherenkov detectors Poster Session

Speakers

Jon Lapington (University of Leicester)Dr Steven Leach (University of Leicester)

Description

The Compact High Energy Camera (CHEC) is a focal plane camera designed for two mirror Schwarzschild-Couder design Imaging Air Cherenkov Telescopes (IACT) such as the SST-2M variants on the Cherenkov Telescope Array (CTA). It utilises a 2048 pixel array of silicon photomultipliers (SiPM) arranged in thirty-two 8 x 8 pixel tiles. Each detector tile is instrumented with a front-end electronics (FEE) module designed to provide single photon counting with sub-nanosecond timing, full waveform digitisation and event triggering capabilities.

The FEE module has 64 identical channels each comprising an analogue shaper to optimise the pulse characteristics for the high speed digitiser, and a slow readout of pixel photon count rate to enable star tracking for telescope pointing determination. Conditioned event pulses are fed to the TARGET chipset which consists of a high speed 1GS/s 12-bit digitiser in parallel with a comparator, acting on summed groups of 2 x 2 channels known as superpixels. The latter provides a first level over-threshold trigger which is processed by pattern-matching algorithm to generate a camera trigger for a validate event. Valid event determination results in a full readout of the camera, each of the 32 FEE modules providing 64 digitised waveforms of typically 96 ns duration.

We describe the optimisations undertaken for the latest FEE module designed for CHEC. Analogue and digital functionality have been physically separated to minimise crosstalk by optimisation of PCB layout, use of the latest TARGET chipset in which trigger and digitiser functionality are separated onto two chips, and electromagnetic shielding. Power conditioning for the FEE and SiPM array has been moved to a separate PCB which also houses the housekeeping monitoring.

We present results of FEE performance including noise, crosstalk, linearity, and dynamic range both from initial bench tests and from full camera testing in the laboratory. We discuss the fundamental advantages of full waveform capture provided by the FEE for the CHEC camera and its application to the IACT arrays.

Primary authors

Jon Lapington (University of Leicester) Dr Steven Leach (University of Leicester) Mr Duncan Ross (University of Leicester) Mr Julain Thornhill (University of Leicester) Mr Connor Duffy (University of Leicester) Prof. Stefan Funk (ECAP, Universität Erlangen-Nürnberg) Mr Adrian Zink (ECAP, Universität Erlangen-Nürnberg) Gary Varner (University of Hawaii) Richard White (MPIK) Mr Justus Zorn (MPIK)

Presentation Materials

There are no materials yet.
Your browser is out of date!

Update your browser to view this website correctly. Update my browser now

×